https://www.keil.com/demo/eval/c51.htm#DOWNLOAD
http://www.youtube.com/watch?v=bDfX1IblzS4
Thursday, 28 February 2013
Tuesday, 26 February 2013
Monday, 25 February 2013
Saturday, 23 February 2013
Wednesday, 20 February 2013
altium create FPGA
project -> FPGA project -> add to project schematic -> FPGA generic lib, port plugin place part -> tools -> quiet annotate -> connect wire, buses, place bus entry, label bus net net[x..y], label ramification net[z] -> project compile, error message -> project configuration manager -> add constraint -> view, device view, compile, synthesis, build, program -> place sheet symbol, tab name symbol, select sch file (file should be added to project first) -> place add sheet entry, io -> or -> design, create sheet symbol from sheet, select .vhd file (file should be added to project first)
Monday, 18 February 2013
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